Rationale

The aim of this project is to define a mixed signal subsystem for the nanosoc reference design. 

The mixed signal subsystem should be able to sample analog signals at a regular sampling rate, and transmit a digital representation of this signal to the rest of the nanosoc system. In order to interface with real-world signals in a digital System on Chip ("SoC"), an analog to digital conversion ("ADC") is needed. 

The high bandwidth expansion subsystem is for use in systems where high bandwidth transfer to the hardware accelerator is required. This subsystem can be added to a larger SoC through the 2x full AXI ports (1 subordinate and 1 manager).