Low power design
Designing components and systems with an emphasis on minimizing active (dynamic) and standby (static) power consumption. Increasingly this is addressed by careful logical design of the design in RTL together with companion "power intent", provided as Unified Power Format (UPF) annotation, standardized in IEEE 1801 specification.
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Competition: Hardware Implementation
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Static Memory, Custom Physical Design, Standard Cell Design
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Post-PhD Researcher - Adjunct Assistant Professor
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Machine Learning on Resource-Constrained Embedded Systems
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PhD Student
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