Low power design
Designing components and systems with an emphasis on minimizing active (dynamic) and standby (static) power consumption. Increasingly this is addressed by careful logical design of the design in RTL together with companion "power intent", provided as Unified Power Format (UPF) annotation, standardized in IEEE 1801 specification.
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Competition 2024
Competition: Hardware Implementation
Competition 2023
Competition: Hardware Implementation
Known Good Die
Known Good Die
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Neuromorphic Chip Designing, VLSI architecture designing, AI/ML
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Research Scholar
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Research Area
unconventional computing, bio-inspired fault-tolerance, design optimisation, neuromorphic hardware
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Neuromorphic IC Design & Hardware Acceleration of Deep Learning
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Research Scholar
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