Mali Graphics Processor Unit (GPU) use 16x16 pixel tile-based rendering to minimize external memory accesses keeping the entire working set for a tile in fast on-chip memory tightly coupled to the shader core. Processing takes two passes, the first executes all the geometry processing and generates a tile list data structure of primitives that contribute to each tile, the second executes all the fragment processing, tile by tile, each write to memory is a final state tile. The Mali architecture has benefits for some operations such as anti-aliasing while other operations such as tessellation are more efficiently handled in GPUs that support full frame processing.

Mali GPUs use compression to reduce bandwidth. Adaptive Scalable Texture Compression (ASTC) offers a variety of bit rate and colour component options for content developers to manage  quality/bandwidth trade off.  Arm Frame Buffer Compression (AFBC) is used when transferring data between IP blocks within a SoC design. It uses a block based approach for spatially coordinated compression and sends fixed headers identifying tile positions in the buffer first, followed by the compressed tiles.

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Competition: Hardware Implementation
A 28nm Motion-Control SoC with ARM Cortex-M3 MCU for Autonomous Mobile Robots
Known Good Die
P. N. Whatmough et al. 2019 Symposium on VLSI Circuits

16nm SoC with A53 and eFPGA for flexible acceleration

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Research Area
Machine Learning, Transfer learning for Edge AI applications
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I think Characterising the types of accelerators might be a good idea, such as Graphics accelerators and ML accelerators to make it easier to distinguish which accelerators are used where. 

Along with this, I think we should have a standardised table to specify bus compatibility and throughput specifications/limitations for each accelerator to make it easier for researchers to make an educated decision into which accelerator to use in their project.

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