Behavioural Modelling
Creation of a "Behavioural Model" of the system consisting of behavioural blocks each described with a high level description language.
Projects Using This Design Flow
Competition 2024
Competition: Collaboration/Education
Reference Design
Active Project
Collaborative
Request of Collaboration
Experts and Interested People
Members
Name
Research Area
UML-B
Role
Dean of the Faculty of Engineering and Physical Sciences
Related Project Milestones
Project | Name | Target Date | Completed Date | Description |
---|---|---|---|---|
Battery Management System-on-chip (BMSoC) for large scale battery energy storage | Behavioural Modelling |
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IMPLEMENTATION OF FIXED TIME BASED TRAFFIC LIGTH SYSTEM USING FPGA WITH VERILOG HDL. | Behavioural Modelling |
abstract representation of the system |
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ADC Integration in nanoSoC | Behavioural Modelling |
Model the analog behaviour of the subsystem and confirm it meets the requirements |
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