CoreLink DMA-230

DMA-230 is a low gate count (3-10k gates) DMA controller that is compatible with the Advanced Microcontroller Bus Architecture (AMBA) AHB-Lite protocol using a single AHB-Lite master for transferring data using 32-bit address and data buses. It perform memory-to-memory, memory-to-peripheral and peripheral-to-memory transfers and allows slow peripherals to stall the completion of a DMA cycle.

Explore This Technology

Contribution
Arm
Resources
Block diagram of CoreLink DMA-230
Copyright © 1995-2021 Arm Limited (or its affiliates). All rights reserved.

Projects Using This Technology

Reference Design
Active Project

DMA 350 integration with nanoSoC

learn more
Reference Design
Active Project
dwn @ soclabs

nanosoc re-usable MCU platform

learn more
Collaborative
Request of Collaboration

DMA Infrastructure Developments
learn more
Not see the kind of project you are looking for? Create a Request for Collaboration project to find potential collaborators for your idea.

Experts and Interested People

Members

 
Name
Nick Gian
Research Area
Hardware Design
Role
student
 
Profile picture for user epi_baikas
Name
Epifanios Baikas
Research Area
Machine Learning on Resource-Constrained Embedded Systems
Role
PhD Student

Actions

Interested in this topic? Log-in to Add to Your Profile

Add new comment

To post a comment on this article, please log in to your account. New users can create an account.