View Competition: Collaboration/Education Projects

Competition 2024
Competition: Collaboration/Education

IMPLEMENTATION OF FIXED TIME BASED TRAFFIC LIGTH SYSTEM USING FPGA WITH VERILOG HDL.

This Project is to develop traffic light system that can reduce traffic congestion with the aid of counters for each lane and acts wisely with the intersection in real time based with a fixed time constrain, include both hardware and software requirements using SOC FPGA technology with fundamental specification for the Register Transfer Level (RTL).

Competition 2024
Competition: Collaboration/Education

Low-Cost and Low-Power Data Acquisition System(DAQs) for Real-time Data Collection

The development of a Low-Cost and Low-Power Data Acquisition System(DAQs). The DAQs will be made up of end-terminal and a gateway. The end-terminal will be micro-controller-driven device built on a SoC FPGA technology with built-in capability for machine learning. The end-terminal will be able to transmit and receive data using the Low Power Wide Area Networking (LPWAN) communication protocol that functions on LoRA.LoRa is a wireless radio frequency technology that operates in a license-free radio frequency spectrum.

Competition 2024
Competition: Collaboration/Education

A digital audio dynamic range compression accelerator for mixed-signal SoC
Compression Overview

The dynamic range processor is a DSP function which does as it says on the tin; it compresses the dynamic range of the incoming signal. This is used most commonly in the music industry for its effects on the perceived loudness of audio. It is also used extensively in hearing aids to compensate for the user’s reduced dynamic range of hearing. In this project a hardware accelerator is developed for the purpose of dynamic range compression of digital audio. This accelerator will be implemented in a mixed-signal infrastructure.

Competition 2023
Competition: Collaboration/Education

Wireless smart machine box for industrial IoT fault detection and notification
Frequent collisions and vibrations mean machinery components in modern factories suffer from wear and aging. Bearings and gears play a significant role. This work developed a wireless smart machine box for industrial IoT fault detection and notification. The Arm based SoC design performs feature extraction from the sensed vibration data and AXI based Direct Memory Access (DMA) to support local Random Forest machine learning. Data is also transmitted via a wireless sensor network to cloud based actions.
Competition 2023
Competition: Collaboration/Education
https://www.istockphoto.com/photos/hell-fire

Hell Fire SoC

Systolic arrays are critical in parallel computing. They efficiently accomplish tasks like matrix multiplication and signal processing by coordinating a grid of processing components to perform synchronized operations. The structured data flow reduces memory access while increasing processing, resulting in substantial speedups. Systolic arrays are used in a variety of domains, from AI model training to scientific simulations, to improve speed and enable complicated computations that typical sequential approaches struggle with.

Competition 2023
Competition: Collaboration/Education

Fast-kNN: A hardware implementation of a k-Nearest-Neighbours classifier for accelerated inference
Project Motivation and Goals

The k-Nearest-Neighbours (kNN) algorithm is a popular Machine Learning technique that can be used for a variety of supervised classification tasks. In contrast to other machine learning algorithms which "encode" the knowledge gained from training data to a set of parameters, such as weights and biases, the parameter set of a kNN classifier consists of just labelled training examples. Classification of an unlabelled example takes place by calculating its Euclidean distance (or any other type of distance metric) from all the stored training examples.