Welcome to the Student Area!

SoC Labs is in one view a shared repository of resources, tools and other materials to help you in your System on Chip development activity. More importantly in our view, it is a collection of experience and a way to have many potentially beneficial collaborations.

This area of 'interest' is for the hardware design ecosystem for Arm based System on Chip developments. This area is for discussion of design techniques. Specific design flow actions should be discussed in the design flow section.

Designing components and systems with an emphasis on minimizing active (dynamic) and standby (static) power consumption.

When designing a high-speed chip, whether that is for high-speed digital applications or analog wireless applications, radio frequency (RF) design is involved. 

Once a System on Chip (SoC) design has fabricated in a foundry the individual items need to be put into an  electronic package that protects it from the external environment and also interconnects it to other parts of a larger system, often a Printed Circuit Board.

The Machine Learning 'interest' area covers topics at the intersection of Machine Learning and SoCs from both the hardware and software perspective.

This area of 'interest' is for the software ecosystem for Arm based System on Chip developments. Software covers a large field of activity from basic boot sequence, firmware, operating system kernel, device drivers, middleware and application level. 
 

In computer programming and software development, debugging is the process of finding and resolving bugs (defects or problems that prevent correct operation) within computer programs, software, or systems.

The definition of firmware varies but most describe a specialist form of software that is by design tightly coupled to hardware behaviour and intrinsically linked to the operation of the hardware.

Is not a programming language, it is an IEEE Standard C++ class library for system and hardware design. Knowledge of the SystemC library allows it to be extended using the C++ language to enable SoC design and verification activities.

This area of interest is for this web site, the SoC Labs community portal. Here we discuss the site's structure, operations and any issues the community feel need improvement. 

All content on the SoC Labs portal is moderated. This is to ensure the content is useful to the community.

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