Corstone 101 for m3

Example Corstone 101 block diagram
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Corstone-101 combines various system IP components for Cortex M3 based System on Chip designs and a subsystem (SSE-050) integrating the processor, memory, debug, security, and power control. It also contains the Cortex-M System Design Kit for SoC designs using the M0, M0+, M3 and m4 processors. It has a selection of AMBA AHB and APB infrastructure components and  embedded Flash controllers.



The GFC-100 Generic Flash Controller provides the generic system side function that allows a SoC to access eFlash memory. It must be integrated via the Generic Flash Bus (GFB) with Foundry IP specific components to handle specific interfaces, timings, and protocols of a foundries memory offering. It supports an APB master interface. Communication between the system and eFlash memory is through the Generic Flash Bus.

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