Tape Out
Tape Out is the hand over point from the SoC design flow to the physical device fabrication flow. It is usually the point where the design is past from the designers to the wafer production facility. There may be an intermediate step if the design is to be combined with others as part of a Multi-Part Wafer (MPW) service.
One of the key aspects is translating the final design into mask sets used in the key part of the fabrication process, the photo-lithograpy steps that pattern the wafer to build up the features that make the functional devices. The skills with Tape Out involve using Computer Aided Design software to inspect and qualify the many layers of circuit/device design which are made into masks. As well as checking before submission that non of the wafer foundry rules have been violated the work may need to respond to issues identified in checks at the foundry that could cause potential problems in manufacturing the design.
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Should this really be in Physical Design under Design Flow
The SoC Labs site is still evolving and we may not get things in exactly the right place to start with. A few people have felt this Interest is really a stage in the Physical Design and part of an ASIC design flow.
On reflection I agree.