SoC Labs site

Site structure showing design flow

This area of interest is for this web site, the SoC Labs community portal. Here we discuss the site's structure, operations and any issues the community feel need improvement. 

If you are new to SoC Labs, then knowing how we structure information on the site will help.

Projects: As a community activity we form our collaborations around shared Projects. A project can be a current activity, a complete activity (Case Study) or a planned activity (Request for Collaboration). A project has a timeframe and uses the two other significant aspects of a SoC development, the selection of technology or IP blocks that make up the SoC and the design flow that is followed from specification through to final instantiation of the system. 

Technology: Any System On Chip usually involves the use of pre-existing IP blocks and some novel parts specific to the SoC. The first part of a design flow is Architectural Design where pre-existing IP blocks are selected and further design activity for the additional novel aspects identified. SoC labs is based around the Arm ecosystem and so you would expect a SoC design has an initial activity of selecting some base Arm IP. In the technology section of the site you will find summaries of the technologies associated with SoC Labs either from the core Arm Academic Programme or community delivered either via a SoC Labs project or from a prior research activity. You can use the navigation scheme above for a tree view to get more details for each technology.

Design Flow: The rationale is there are four high level generic stages that describe the necessary steps in any design flow that takes a SoC design from initial concept to final implementation. In each stage the flow is broken down further to describe specific example flow activities. The final area of example flows is to provide specific flow/tool implementation examples with descriptions on how the specific flow implementation delivers the requirement of the general design flow steps. An initial example describes an ‘example flow’ for the Xilinx(R) PYNQ(R) platform. As the community develop additional example flows we hope to share and discuss how these flow delivers the requirement of the general design flow steps. In this regard an 'example flow' should instantiate the steps of the generic flow with specific information, this is similar in object oriented models of a 'base class' in the generic flow being used to create a specific class in the 'example flow'.

Organisations: When you first sign up to SoC Labs, you will be added to your university's Organisation. If you are the first person from your University you may have to define the organisation.

News/Articles: For announcements and other worthy news for the community there are Articles which is listed under the News section.

For all other types of information, including items on the SoC Labs site itself we have Interests.

When looking at an item there should be links on the side to the other topics related such as technology IP being used or the stage in the design flow. We hope these help. If not you can always leave a comment on any item including this one, see below.

Please feel free to add comments and make suggestions. The site is developing, just as the community develops, and we welcome the opportunity to get any feedback and ideas you feel would be of benefit to the community.

In some of the nodes below you will find additional information on specific areas of interest such as the site's structure that may help you make better use of the resources of the SoC Labs community portal. While each area of the portal should have a description of the purpose of the specific area we realise it is not always clear and so we hope either by looking at material here, or by raising a comment and getting an answer, you will find an explication that helps you make better use of the site and get the most out of the community.

We look forward to hearing from you. 

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We have been implementing some improvements to notifications. People can choose their preferences for notifications in their profile. Our general view is that people will want to get notification on how others in the community view their contributions. For example the site will notify people when comments are responded to and liked/disliked. We are happy to adjust these things based on community feedback so please do let us know your views,

I added a comment in the example design flow to describe the basic structure ot the 'design flows' area of the site. 

FPGA SoC prototyping with Xilinx(R) PYNQ(R) platform | SoC Labs

The principle is that the area four high level generic stages that descibe the necessary steps in any design flow implementation and then there is an additional area where we describe specific example flows. As we add additional example flows we should aim to discuss within their descriptions how the specific flow implementation delivers the requirement of the general design flow steps.

We have made some changes to Projects and Organisations now that SoC Labs is growing and simple linear display is no longer helpful. We have added geographic visualisation of organisations and separated the Projects into classes such as Reference Designs, Contests and Collaborations.

Now that the Semiconductor Education Alliance is evolving we are getting support from more key industry players and these are joining the community and providing us with some support which we will add more details on soon.

Always happy to hear any improvements people would like.


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