Takes an Architectural Model and creates a full behavioural description of a system that can be run in simulators or transformed into a technology independent register-transfer level (RTL) description.
System on Chip (SoC) designs often integrate digital and analogue circuits and these require different models and methods of simulation and verification.
In the digital domain Transaction-Level Modelling (TLM) can create a behavioural description of a system with enough detail to allow verification of the design by simulation but abstracting the designer from many detailed implementation concerns. TLM can be undertaken at different levels of abstraction. At the highest level of abstraction untimed models consist of computation objects that send and receive abstract data via communications objects. In SystemC the computation objects (Module/Process) interact via communications objects (Channels/Ports). Further stages of refinement reduce the abstraction and add more implementation detail, for example specific bus protocols can be added in either cycle approximate models using simplified estimated times or cycle accurate models where explicit timing, pin and even wire details are added. An implementation level model is one where components are modelled at register-transfer level.
While the digital domain operates in pure Boolean behaviour the analogue domain can have continuous-time, non-linear behaviours. Behavioural models for the analogue domain use forms of mathematical approximation, linear or non-linear regression, neural networks, etc. to define relations between inputs and outputs of the circuit and can have long simulation times.