Security
System-on-Chip (SoC) security depends on architectural and secure IP blocks in order to protect systems, networks, and data from a range of attacks and limit potential vulnerabilities.
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People Members have identified as Experts and Interested People in this field
| Name | Organisation | Description | Links |
|---|---|---|---|
| Jakub Szefer | Yale University |
Jakub has produced an interesting tutorial on Principles of Secure Processor Architecture Design. |
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| Visvesh Sathe | University of Washington |
A very interesting presentation on True Random Number Generation circuit design in the first part of this Research Colloquium |
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| Politecnico di Milan |
An interesting paper from Politecnico di Milan on a framework for extracting a side-channel centric microarchitectural leakage model from in-order CPUs validated using Cortex-M4 and Cortex-M7. |
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Side-channel centric microarchitectural leakage model
An interesting paper from Politecnico di Milan on a framework for extracting a side-channel centric microarchitectural leakage model from in-order CPUs validated using Cortex-M4 and Cortex-M7.
Exploring Cortex-M Microarchitectural Side Channel Information_Leakage
Tutorial on Principles of Secure Processor Architecture Design
Jakub Szefer from Yale has produced an interesting tutorial on Principles of Secure Processor Architecture Design.
tutorial_principles_sec_arch_20190217 (yale.edu)
True Random Number Generation circuit design
A very interesting presentation on True Random Number Generation circuit design in the first part of this Research Colloquium by Visvesh Sathe, University of Washington
UWECE Research Colloquium: February 4, 2020 - Visvesh Sathe, University of Washington - YouTube
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