Corstone 300 for M55

Corstone-300 combines various system IP components for Cortex M55 based System on Chip designs and the Ethos U55 accelerator for Artificial Intelligence and Machine Learning workloads.  Corstone-300 components support TrustZone with system-level Secure and a Non-secure operation.

The bus protocols supported are Advanced Extensible Interface (AXI5), Advanced High Performance Bus (AHB5) protocol and Advanced Peripheral Bus (APB4).

The PCK-600 Power Control Kit provides components for SoC clock and power control using the Arm Q-Channel and P-Channel low power interfaces.

The GFC-200 Generic Flash Controller provides the generic system side function that allows a SoC to access eFlash memory. It must be integrated via the Generic Flash Bus (GFB) with Foundry IP specific components to handle specific interfaces, timings, and protocols of a foundries memory offering. It supports two masters for Non-secure and Secure domains. Communication between the system and eFlash memory is through the Generic Flash Bus.

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Corestone 300 block diagram
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