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Lightweight DMA Infrastructure
The project aims to produce lightweight SoC Infrastructures using the variety of AMBA bus architectures. An initial NanoSoC infrastructure using AHB for small scale accelerators with low data throughput and complexity is complete. The project is now looking for collaboration on an AXI based SOC, for larger scale accelerators with higher data throughput and added complexity.
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Event-B to FPGA process flows

The aim of the project will be to establish the tool chain and flows to demonstrate Event-B refinement to a Register Transfer Level implementation that can target an FPGA implementation. Previous European, EC Information and Communication Technologies FP7 DEPLOY and European Union ICT Project ADVANCE developed VHDL code generation from Event-B models. A number of projects within these and other research programmes have looked at the required process flows. The Rodin Platform is an open source Eclipse-based IDE for Event-B.

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