Reference Design Comparison Table
| Title | nanoSoC | milliSoC | megaSoC |
|---|---|---|---|
| Class | Entry | Mid Range | High End |
| Reference Design | nanoSoC | milliSoC | megaSoC/Corstone 1000 |
| Staffing | Single student / academic | Academic + dedicated post-doc | Academic Team |
| Time Scales | 6 months to 1 year | 1+ years | 18 Months - 3 Years |
| Model Forms | small | Real Time | Full Video/Large AI Model |
| Tape Out / Package and Board Costs | From 10k Euro | 25k-50k EUR | >50K - >>50K |
| Processor(s) | M0 | R5 | A53 |
| Processor(s) (speed) | <250 Mhz | 250-800 MHz | 1 GHz |
| Data Rates / On Chip Comms | <2.5 Gbps | 10-80 Gbps | >100 Gbps |
| Data Rates / Off Chip Comms | <50 Mbps | 0.1 - 0.8 Gbps | >1 Gbps |
| On Chip Memory Requirements | 32KB to sub MB | 2 MB+ | 4 MB+ |
| Virtual Prototype Environment | Xilinx ZCU104 | Arm MPS3 | HAPS |
| Tape Out Node | 65nm | 28nm | 16nm |