IP Modelling Design Flow - now depricated

One of the first stages of the behavioural design stage of a project is to produce a model which can represent the operation of your IP. This allows more flexibility in experimentation and structure of your IP and can provide a quick method for finding issues in the concepts of your IP. 

Digital Algorithmic Modelling

These models can be produced in a variety of tools/languages and are not bound to hardware description languages so languages like MATLAB and Python are often chosen to build models. They can not only be used to perform architectural and behavioural exploration, but to also generate stimulus and reference data for the verification in the HDL implementation stages of your accelerator design where the generated output can be plugged straight into your design testbenches. 

Analog modelling

This can be used to produce a high level model of your IP. Tools that can be used for this include mathematical models, MATLAB and SPICE. These models are usually technology independant and quite often may not take into accound some of the parasitics involved in the system, but they can provide a functional understanding of your IP. 

 

 

Projects Using This Design Flow

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Experts and Interested People

Members

 
Placeholder
Name
Falah
Research Area
low level exploitation
Role
student
 
Placeholder
Name
Tim
Research Area
Educational technology
Role
Head Tech
 
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Name
Rahul Tiwari
Research Area
CAD tools, VLSI design flow
Role
Layout Engineer
 
Profile picture for user Rashi Dutt
Name
Rashi Dutt
Research Area
Low power VLSI architecture
Role
Researcher

Related Project Milestones

Project Name Target Date Completed Date Description
Check year Algorithmic Modelling Design Flow (173)

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