Competition 2023
Competition: Hardware Implementation

Monitoring and enhancing plant growth in space ecosystems

This project focuses on developing a plant growth monitoring system for space exploration missions using the ARM Cortex-M0 microcontroller core. The projects aim to develop a SOC based on ARM M0 core for interactive plant monitoring by interfacing AHB lite, GPIO, timers, and communication protocols such as UART, I2C, SPI, and co-processors.  This project also proposes two co-processors for interactive plant monitoring and control. One AI co-processor for classification and prediction of plant and environmental data. Another coprocessor acts as a sensor gateway to control the data from various sensors. The system aims to provide real-time data on environmental parameters crucial for plant growth, especially in space, enabling users to monitor and optimize the conditions for their plants' health and productivity. The objective is to create an efficient solution to monitor and optimize plant growth in the unique environment of space. The system integrates sensors for measuring temperature, humidity, light intensity, CO2 levels, and nutrient availability, specifically designed for space applications, with the ARM Cortex-M0 core. Firmware is developed using the embedded C programming language to interface with the sensors, collect real-time data, and process it for plant health and growth monitoring. A user-friendly interface makes the visualization of plant growth data and environmental factors possible. The ARM Cortex-M0 core enables remote control of environmental variables, including temperature and humidity, optimizing plant growth based on real-time data.  The project also emphasizes power optimization, maximizing operating duration on constrained power resources in space by utilizing low-power modes of the ARM Cortex-M0 processor. The anticipated results include a fully functional system for tracking plant growth, real-time environmental parameter monitoring, remote control capabilities, and adequate power management. Research, sensor integration, firmware development, user interface design, remote monitoring and control implementation, power optimization, documentation, and project completion are all covered in the twelve-week project timetable.    This project's successful completion will advance knowledge of how plants grow in microgravity and aid efforts to colonize space in the future. It will also increase the viability of long-duration space trips.

Project Milestones

  2. Design and verification of co-processors

    Target Date

    Design of AI core, sensor gateway core and modeling using verilog code. UVM Verification of cores

  3. Integration of IPs

    Target Date

    Integration  of ARM M0 core, AHB lite interface, Memory, GPIO, UART, AHB  to APB interface, SPI, I2C and Sensors. UVM verification of  SOC

  4. Simulation and Hw/Sw co-simulation

    Target Date

    Software development and conversion  to machine instruction. Hardware  software co-verification

  5. FPGA implementation and verification

    Target Date

    FPGA implementation  of SOC. Prototype development and verification  in  real-time environment.

  6. Physical design

    Target Date

    ASIC  synthesis, timing analysis and  evaluation  of  area, performance and power. Layout design

Comments

Hi Alex,

Thanks for sharing this and signing up to SoCLabs! Its looks fascinating! What do you see as your SoC structure? Are you planning on developing your own co-processors or using existing IP to integrate within your System? Also, have you seen NanoSoC? Its a Cortex-m0-based system which can be adopted by researchers that allows for you to integrate your own peripherals and accelerators?

Thanks,

David M

 

Hi Alex,

Looking at the project description I would think there is a good correlation between the NanoSoC reference design and this may be an option for you. This is being developed to support custom accelerators. I would be very interested to understand a bit more your design thoughts on the 'sensor gateway core’ and your outline SoC architecture ideas for example bus allocations for sensors, etc. 

Look forward to hearing from you,

John.

Hi Alex,

I see from the description that you plan 'UVM Verification of cores'. David has a project for the verification of the NanoSoC reference design and that is using the Python based Cocotb verification environment. We are open to using different verification environments and so would be interested to know a little more about your plans for UVM test benches. Cocotb was chosen as it is relatively simple to understand and so can quickly get a Design Under test (DUT) but we don't see this as restricting other forms of stimulus generation under UVM or alternate environments.

John.

Dear  John,

Thank you for the comment. As mentioned by Mr. David Verification of individual IPs , verification of integration of IPs, verification of integration among IPs, use case validation, performance validation, and external interface verification are  the major challenges to be addresses in SOC verification. We have started addressing these  issues based on UVM environment and AHB lite interface. But we are opened  to  python based verification using Cocotb also, and  would like to explore more about this.Thank you.

This sounds like a really interesting project. You say you have a 12 week project timetable, could you add some Milestones to this project?

Looking forward to collaborating,

John.

 

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Project Creator
Alex James

Dean at Kerala University of Digital Sciences, Innovation and Technology
Research area: Neural network, Mixed signal circuits

Technology

Cortex-M0 Cortex-M0

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