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Title Updated date Comment count
Interference Detection and Mitigation Accelerator for Automotive Radar SoCs 1 month 1 week ago 11

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Subject Comment Link to Comment
Analog Front end

Thank you for showing interest.  Our proposed SoC system processes complex baseband mmWave radar IQ samples.

Our design works in purely digital domain on FPGA-SoC (PL with ARM PS). Our interest is of course to be able to integrate 

our logic part of the design (accelerator)  via some wrapper to your SoC flow. 

Please note that constructing mmWave analog front end is serious amount of extra and non-novel work which does not suits the University research needs.

For testing the system we use real Radar IQ data captured using TI radar chip and communicated via ethernet or  USB or some other port.

I hope  this clarifies and answers your question.

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AAA non-member

From Oulu University side it seems that we  are not part of Arm AAA program.

Do you think this to be a bottleneck for this project?

 There is a AAA form which someone from our University side  can fill and submit but it seems that there is also a  legal contact require. This might have some legal paperwork bureaucracy which I am not sure if our University  may want to participate in.

Other question is that your soclabs website  mentioned about obfuscated ARM IP usage which seems to be a possible way. 

Do you think it is good enough to follow this path and run the given accelerator project at SoCLabs / Accelerator Project · GitLab (soton.ac.uk)

as when we try to run socsim simulate/socsim/test_aes128.sh TESTNAME=aes128_tests it asks about ARM IP

 

 

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Milestone 1: Architectural Design

 

Hi, Thank you for your question and sorry for late response. 

Yes, for the proposed accelerator architectural design is fine.

One question:

From Oulu University side it seems that we  are not part of Arm AAA program.

Do you think this to be a bottleneck for this project?

 There is a AAA form which someone from our University side  can fill and submit but it seems that there is also a  legal contact require. This might have some legal paperwork bureaucracy which I am not sure if our University  may want to participate in.

Other question is that your soclabs website  mentioned about obfuscated ARM IP usage which seems to be a possible way. 

Do you think it is good enough to follow this path and run the given accelerator project at SoCLabs / Accelerator Project · GitLab (soton.ac.uk)

as when we try to run socsim simulate/socsim/test_aes128.sh TESTNAME=aes128_tests it asks about ARM IP

view
Data bandwidth requirements

Our data throughput is 50 Mega samples per second. Currently we are processing data from two receive antennas. For more antenna receive one can scale it up easily to realize what is the throughput need. We dont expect to process more than 1-2 receive antennas so 50 mega should be good to go.

Thanks

Zaheer

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Comments

From Oulu University side it seems that we  are not part of Arm AAA program.

Do you think this to be a bottleneck for this project?

 There is a AAA form which someone from our University side  can fill and submit but it seems that there is also a  legal contact require. This might have some legal paperwork bureaucracy which I am not sure if our University  may want to participate in.

Other question is that your soclabs website  mentioned about obfuscated ARM IP usage which seems to be a possible way. 

Do you think it is good enough to follow this path and run the given accelerator project at SoCLabs / Accelerator Project · GitLab (soton.ac.uk)

as when we try to run socsim simulate/socsim/test_aes128.sh TESTNAME=aes128_tests it asks about ARM IP

 

 

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