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Design verification engineer
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Title Updated date Comment count
High Capacity Memory Subsystem Development 1 month ago 36

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Authored Comments

Subject Comment Link to Comment
Request to join the group

Hi Team, 

Can you please add me the group. I have experience in verification using UVM and im learning to use cocotb,pyuvm. 

 

Thanks 

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Request to join

Hi Folks, 

Can anyone add me to the group. 
I have experience in functional verification 

 

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Verification

Hi John, 

I haven’t gone through all the comments, will check them.

Currently I have experience in IP level verification and this Subsystem verification will be  a new learning to me. 
I would like to take part in verification side. I will go through project description in detail and will try to come with draft version of verification plan.

Let me know is there any doc or link related to the project. 

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Hi John, Thanks for the…

Hi John, Thanks for the heads up..I have joined the slack..

Will start to use slack for interaction. 

Jayaraman

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#38

Comments

Hi John, 

I haven’t gone through all the comments, will check them.

Currently I have experience in IP level verification and this Subsystem verification will be  a new learning to me. 
I would like to take part in verification side. I will go through project description in detail and will try to come with draft version of verification plan.

Let me know is there any doc or link related to the project. 

Hi,

I have sent you a link to the Slack. There is a channel specifically for verification but it is not active. 

https://soclabsddrcon-hfc3701.slack.com/archives/C07RL30CLSY

Perhaps you could lead this channel and others can add to this as you flesh out the verification plan? There is a comment in the channel around establishing the FPGA test environment. You might want to look at this Continuous Integration and Deployment for verification | SoC Labs for an introduction to how we are looking to deploy a virtual FPGA environment for ongoing verification. 

We are holding regular Teams calls on a Friday and one of these we would like to dedicate to verification discussions at some point. Hopefully these steps will help you engage with the project and collaborate with the rest of the team.

John. 

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