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Sensing for Precision Agriculture | 1 month 3 weeks ago | 11 |
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Title | Updated date | Comment count |
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Sensing for Precision Agriculture | 1 month 3 weeks ago | 11 |
Comments
Custom wrapper file for the ADC
"Ted (Kezhi) is investigating a custom wrapper file for the ADC, drawing from https://soclabs.org/project/adc-integration-nanosoc"
Please reach out and ask for any help you need. An easy way is to simply add a comment on the ADC integration project and Daniel should respond. Asking questions in this way not only helps you but also other people. We are very keen to get people to collaborate on IP blocks and also design flow and environment issues.
Look forward to hearing from you.
What is your role in the project
Hello,
I was wondering what your role in the project is? I can't see you have added any technology items or workflow stages to your profile to indicate things you are interested in or working on.
It is simple to do, just edit your profile;
and add your interests;
Another way to add your interests
The other way to add these is on each page that you find is interesting or part of your work you will find the action button to add it to your profile:
Having these should make it easier to find people to help and collaborate.
Analog front end team or processor team?
Hello,
I see in Milestone 4 of your project that you have an Analog front end team and a processor team. Which one have you been assigned to work on?
We look forward to hearing from you.
John.
Hi john,I'm assigned to the…
Hi john,
I'm assigned to the processor team.
cheers,
kezhi
What are you working on
Hi,
What are you currently working on. I saw a few items around picking up the nanoSoC reference design and some reference the the HellFire SoC as that originally used the IP for the M0 that was freely available while you waited for the AAA access to the M0 core IP. Are you looking at the high level layout of the SoC from a hardware perspective or are you considering what firmware or software you will run on the processor? Are you using the project structure we provided for nanoSoC?
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