Low-Power Hardware Accelerator for Compression of ECG Signals
This project focuses on the design and implementation of a low-power hardware accelerator for compressing Electrocardiogram (ECG) signals to extend battery life in wearable and implantable medical devices. The system utilises Compressed Sensing (CS) algorithms. The algorithms are first modelled and optimised in Python using clinical MIT-BIH data to ensure the diagnostic error rate remains strictly below the 9% medical threshold. Optimised algorithms will be translated into a custom SystemVerilog Intellectual Property (IP) block and verified against the Python golden reference. To ensure compatibility with broader systems, the accelerator will be engineered under strict area and clock constraints and features standard interfaces, such as an AHB slave port, preparing it for seamless integration into the open-source NanoSoC fabric.
Project Milestones
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Architectural Design
Design Flow -
Behavioural Design
Design Flow
Project Creator
Amrit Singh Ittan
Msc. Microelectronics Systems Design Student
at University of Southampton
Research area: Design and Verification of a Low-Power Fixed-Point Compressed Sensing Accelerator for ECG Signal
Submitted on
Comments
Add some details to your milestones
Hi,
Now that you have added the milestones you need to add content about what you are going to do for this milestone. If you read the page in the design flow section for the milestone it will help you know what actions are needed. Also look at other projects for inspiration such as the project on sensing by Sydney.
You should set a Target Date by which you expect to complete the tasks. This is only an estimate and you will learn how to estimate how long things will take as you work through your project. It is a good engineering discipline to develop a cycle of estimating tasks and comparing how you did, just like athletes compare their times.
For the milestone Architectural Design there are some tasks in the main page and also a sequence of sub-tasks, each of these is a milestone. Of course you don't have to stick to the design flow milestones and can add your own free text milestones if you find these more helpful.
In the Introduction it mentions the three reference designs and looking at the project scope using ECG data then it would seem the choice of the nanoSoC can be made and you simply add that as the text in the milestone. The team should be able to help you with any questions on other topics such as under separation of concerns, where you look to be developing your IP block by 'defining unique sub-system'.
As you can see with the discussion above, you already have a lot to add to your initial milestone.
John.
Adding the initial milestones
Hi,
I think it will help you if you add some initial milestones and read the pages associated with them in the design flow and then ask us any questions or request any help you need.
John.
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