We have a workshop specifically for North American and Canadian universities arranged with CMC on the 17th October. It would great if you could attend and here about the latest status of SoC Labs activity and also here how to get involved.

Canadian Workshop: Make Academic System on Chip Projects Easy via Collaboration and Reusable Design

And here is the linkedin announcement

Academic System on Chip Projects Made Easy LinkedIn announcement

Look forward to hearing from you.

Luis,

Now you are back home it would be good to get an update on the current milestone. Do we need to set up a call on the ADC?

John.

Progress is being made to develop FPGA Prototyping design flows for the current and planned SoC Labs reference designs including determining the necessary FPGA resources required to accommodate the varying scale of the  SoC Labs reference design. Flows are being developed for the initial nanoSoC design and an A class reference design. There should be more details becoming available over the next few months.

Welcome to SoC Labs. I see you have declared an interest in accelerators and processors. I think it is a very interesting area in the cross over from fixed function custom accelerators in a SoC and the combination of scaling the CPU cores versus reconfigurable accelerators and the memory systems needed to support them.

Welcome, 

It would be great if you could share some of your interests. As you navigate around the SoC Labs site it is easy to add them.

As soon as Srimanth makes this project live then people can join it. Srimanth can add you to the group while he has it in a draft form.

When he makes it live then the Join button will appear instead of ...

Welcome to SoC Labs. Hopefully we will flesh out the details of the project quickly and people can get involved.

Thanks for getting in touch. Happy to progress any discussions on collaboration around the SoC Labs projects.

Hi,

I am sure there will be more opportunities and I think they are going to record the session so you may be able to view it off line. 

As for the RISC-V statement, what makes a good designer is not knowing one tool but knowing about the range of tools in the toolbox. It is a narrow discussion, are the ISAs radically different, no not really. Good designers can switch between architectures as needed. What is more important is having the opportunity to understand how to use the different options to build your skills that will benefit you in the long run and to work with people who accelerate your learning.

I hope we can offer you that opportunity and benefit. I am sure if you take a reasoned case to your head of department based on the skills you feel will benefit you they will see the reason in this.

I am happy to help the discussion if needed.

John.

Hi,

We think it will make great sense for a collaboration between you and the Sydney team. Both of you are looking to develop an SoC for environmental sensing and there will be a lot of common assets that can be shared between the projects and we can also have some joint Teams meet ups to share our expertise and experiences. 

It would good to have a catch up on where you have got to and how we can help move this project along.

John.