Member for
1 year 10 months
Research Area
Machine Learning | SoC Design
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Researcher
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93
SoC Labs Roles
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Projects

Title Updated date Comment count
Arm Cortex-A53 processor 1 week ago 2
High Capacity Memory Subsystem Development 6 hours 40 minutes ago 18
Hell Fire SoC 1 month 3 weeks ago 9
DMA Infrastructure Developments 1 week 3 days ago 9

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Authored Comments

Subject Comment Link to Comment
Sign up Link

Hey, 

Is there a link where we should signup for the collaboration?

Thanks, & Regards

Srimanth Tenneti

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na

na

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Hi David, 

I plan to use a…

Hi David, 

I plan to use a direct interface. 

Thanks, & Regards 

Srimanth Tenneti 

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Update1

Update1

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Collaboration

Hello Everyone

Our goal with this project was to introduce an Open Accelerator platform, and now, we're eager to invite all of you to join us in taking it to the next level.

We value your input, creativity, and collaboration. Together, we can enhance this design in countless ways. Your engagement and suggestions are not only welcomed but crucial to our success.

Thank you for being a part of this journey, and we look forward to your valuable contributions.

Warm Regards,
Srimanth Tenneti

GitHub - https://github.com/srimanthtenneti/Hell_Fire_SoC_Demo/

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I believe it should be live…

I believe it should be live now. I will work with John and his team to get the basic spec for this system as a lot of people have this as a common agenda and will update the page. Then all of us can start working on this. 

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Hi David and Daniel. Let me…

Hi David and Daniel. Let me know if I can pitch in and help with anything. 

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LPDDR Based Memory Architecture

Hi Folk, 

  You can check out this website to get some insights into the LPDDR Memory Architecture. The exact spec is not yet finalized yet and will let you know the details once I have it (ETA : 1 Week). 

Thanks, & Regards 

Srimanth Tenneti 

Link: https://www.systemverilog.io/design/lpddr5-tutorial-physical-structure/

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Introduction

Hello Everyone,  

We are planning to organize a meeting sometime next week to kickoff the project and introduce ourselves. Could each one of you post your areas of interest (related to the project) for us to get an understanding of the team we have here ?

Also kindly let us know your availability (Time and Time Zone) for a meeting on Friday next week.

 

Thanks & Regards 

-Srimanth Tenneti 

 

Template : 

Name :

Areas of Interest : Micro-Architecture/RTL Design/STA/Physical Design/Verification/ ...

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Srimanth Tenneti - Areas of Interest

Name: Srimanth Tenneti 

Areas of Interest: Micro-Architecture, RTL Design (Verilog / System Verilog), Static Timing Analysis, & Physical Design

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14
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