Hey, 

Is there a link where we should signup for the collaboration?

Thanks, & Regards

Srimanth Tenneti

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Hi David, 

I plan to use a direct interface. 

Thanks, & Regards 

Srimanth Tenneti 

Update1

Hello Everyone, 

Our goal with this project was to introduce an Open Accelerator platform, and now, we're eager to invite all of you to join us in taking it to the next level.

We value your input, creativity, and collaboration. Together, we can enhance this design in countless ways. Your engagement and suggestions are not only welcomed but crucial to our success.

Thank you for being a part of this journey, and we look forward to your valuable contributions.

Warm Regards,
Srimanth Tenneti

GitHub - https://github.com/srimanthtenneti/Hell_Fire_SoC_Demo/

I believe it should be live now. I will work with John and his team to get the basic spec for this system as a lot of people have this as a common agenda and will update the page. Then all of us can start working on this. 

Hi David and Daniel. Let me know if I can pitch in and help with anything. 

Hi Folk, 

  You can check out this website to get some insights into the LPDDR Memory Architecture. The exact spec is not yet finalized yet and will let you know the details once I have it (ETA : 1 Week). 

Thanks, & Regards 

Srimanth Tenneti 

Link: https://www.systemverilog.io/design/lpddr5-tutorial-physical-structure/

Hello Everyone,  

We are planning to organize a meeting sometime next week to kickoff the project and introduce ourselves. Could each one of you post your areas of interest (related to the project) for us to get an understanding of the team we have here ?

Also kindly let us know your availability (Time and Time Zone) for a meeting on Friday next week.

Thanks & Regards 

-Srimanth Tenneti 

Template : 

Name :

Areas of Interest : Micro-Architecture/RTL Design/STA/Physical Design/Verification/ ...

Name: Srimanth Tenneti 

Areas of Interest: Micro-Architecture, RTL Design (Verilog / System Verilog), Static Timing Analysis, & Physical Design