Member for
4 weeks
Name
Thuyet Nguyen
Research Area
Digital IC design
Role
Lab engineer
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20
SoC Labs Roles
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Getting Started with SoC Labs

Getting Started with SoC Labs

Design Flow

FPGA SoC Prototyping design flows

FPGA SoC Prototyping design flows

Technology

SoC-400

SoC-400

Authored Comments

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Dear Sir, Actually, our…

Dear Sir,

 

Actually, our universiry, Vietnamese-German University, is applying  for Arm Academic Access program, the staff from Arm introduced us SoCLab.

Whrere we can learn how to design a SoC (both ASIC and FPGA) with Arm IPs.

In my lab, there are some FPGA SoC kits, ZC706, Zybo and DE0-nano and HAPS from Synopsys, besides we also have some educational licences from Synopsys and Cadence EDA tools.

We have some experience in digital design but in IPs design not in SoCs design. We hope we can join SoC projects at entry level, or IPs design from SoCs.

 

Regards,

Thuyet Nguyen

 

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Dear Sir, Thank you verymuch…

Dear Sir,

 

Thank you verymuch for your information.

The nanoSoC is suitable for us, we hope we can join some tasks in development of nanoSoC in 2024 such us verification (using UVM), FPGA prototyping (on HAPS, ZC706...), new digital IPs development etc.

For analog design, my colleague who doing post-doc in our university has background in analog IC design, he can also join some tasks related to analog design.

 

we are looking forward to hear from you soon.

Regards

Thuyet Nguyen

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Comments

Hello,

Welcome to SoC Labs. I see you have a registered a role and a Lab engineer. It would help if you can let us know a little more about your interests in Arm IP and how we might help and collaborate on projects.  I see you have selected FPGA design flow. Do you use Arm based boards in your Labs? We look forward to hearing from you.

Dear Sir,

 

Actually, our universiry, Vietnamese-German University, is applying  for Arm Academic Access program, the staff from Arm introduced us SoCLab.

Whrere we can learn how to design a SoC (both ASIC and FPGA) with Arm IPs.

In my lab, there are some FPGA SoC kits, ZC706, Zybo and DE0-nano and HAPS from Synopsys, besides we also have some educational licences from Synopsys and Cadence EDA tools.

We have some experience in digital design but in IPs design not in SoCs design. We hope we can join SoC projects at entry level, or IPs design from SoCs.

 

Regards,

Thuyet Nguyen

 

We have developed the nanoSoC reference design as an entry level SoC with the purpose of making it simple for academics to use and to be able to add to it. In 2023 we started some projects that added custom accelerators to the SoC, these were fabricated on 65nm TSMC. In 2024 we have projects adding some analogue sensing to nanoSoC. We are always happy to start a collaboration project using nanoSoC and perhaps this is a good way to start? 

We look forward to hearing from you.

Dear Sir,

 

Thank you verymuch for your information.

The nanoSoC is suitable for us, we hope we can join some tasks in development of nanoSoC in 2024 such us verification (using UVM), FPGA prototyping (on HAPS, ZC706...), new digital IPs development etc.

For analog design, my colleague who doing post-doc in our university has background in analog IC design, he can also join some tasks related to analog design.

 

we are looking forward to hear from you soon.

Regards

Thuyet Nguyen

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