The test board bring up for the arm m0 processor soc reference design nanosoc with different custom accelerators has beep progressing. A nice image of it here.

It would be great to hear about your accelerator plans and of these fit within the envelope of one of the reference designs.

Look forward to hearing from you.

John.

Hi Kim,

I am just getting touch again to reconnect. I think we are making progress on developing the reusable reference designs for academic System on Chip projects. If you have any ideas for a potential project or would like to look to collaborate with any of the teams we have working on the various SoC Labs projects then please let me know. 

We look forward to hearing from you.

John.