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University of Moratuwa

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Sri Lanka
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Contributor since: Tue, 08/01/2023 - 19:24

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Competition 2023
Competition: Hardware Implementation

Enhancing HLS4ML: Accelerating DNNs on FPGA and ASIC for Scientific Computing
Project Motivation and Goals

Efficiency in hardware is vital as neural network models become more complex to tackle challenging problems, and optimizing ML hardware architectures has become a crucial research area. Scientists around the world, such as particle physicists at CERN need to accelerate their ML models in FPGA or custom ASICs for various applications including compressing the gigantic amount of data generated by the detectors at Large Hadron Collider (LHC).