Post Silicon

Following the SoC submission to manufacture (tape out) there are an ongoing set of activities in preparation for the return of the fabricated devices. These can include preparation of additional verification assets, the integration of the ASIC into a broader system such a test board or application board, the development of systems software or demonstration applications.

Projects Using This Design Flow

Reference Design
Active Project
Testboard and nanosoc Chip
SoClabs

nanoSoC Test/development Board

Experts and Interested People

Members

 
Research Area
Low power system design
Role
Consultant

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