Member for
1 year
Research Area
Multiprocessor SoC (MPSoC) design, Neural network learning algorithm design, Reliable system design, VLSI/CAD design, Smart manufacturing
Role
Associate Professor
ORCID
Points
20
SoC Labs Roles
Registered User
Projects
Title | Updated date | Comment count |
---|---|---|
Wireless smart machine box for industrial IoT fault detection and notification | 1 month ago | 5 |
BlackBear : A reconfigurable AI inference accelerator for large image applications | 6 months 2 weeks ago | 5 |
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Technology
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My contributions
:
10
My comments
:
2
Overall contributor
:
#10
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To start, we plug the ADI vibration sensor's wireless receiver into the USB port of the Xilinx Pynq FPGA. This allows us to receive wireless vibration sensing data. Next, we use the AXI Serial Peripheral Interface (SPI) to capture the sensing data and execute a Jupyter notebook on the ARM processor for control. This connection also enables us to access data via the Direct Memory Access (DMA) controller in the programmable logic (PL). Within the Xilinx Pynq FPGA, we establish various IPs, such as AXI GPIO, AXI Quad SPI, Concat Interrupts, and AXI DMA. With the help of AXI Interconnection and Clocking Wizard, communication is achieved between the AXI DMA and processing system (PS), as well as between the AXI Quad SPI and PS.
Regarding the AAA, I thought we should click it while submitting the project because the involved Xilinx Pynq FPGA contains an ARM processor. It should be a mis-clicking.
Yes, you can. We are going to create a new topic for SoC Lab 2024. I will let you know when I am done.
Jimmy