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Welcome
Hello,
It is nice to welcome an Arm Ambassador on board. I see you have declared interest in the Xilinx FPGA flow. One of our design rationale was to ease the transition from FPGA flows into a full ASIC flow. This does mean instantiating a little more of the SoC in the custom logic as opposed to depending on IP blocks embedded in the fabric. It would be great to know how you would like to get involved in SoC Labs.
John.
Getting Started
I see you also declared an Interest in the Getting Started. I think we have not had much of a chance to update materials here and any recommendations would be welcome. We have been quite busy getting our nanoSoC reference design taped out. Now that is complete we can show a complete path from initial design through to verified silicon.
We look forward to hearing from you,
John.
Getting Started
Just sent you a mail for a kick-off meeting.
Cheers!
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