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Analog Sensor Requirements
I see in Milestone 4 that you have an Analog front end team and a processor team. Looking at your Git I see you are assigned to the Analog Sensor Requirements task and the Electrochemical conditioning task. I am hopefully assuming you are part of the Analog front end team?
It may be worth discussing your plans with Daniel who is trying to develop some baseline reference design in this area, see ADC Integration in nanoSoC
Hi John, thank you for that!…
Hi John, thank you for that! We have completed the reference design phase of our sensors and will be looking at improving the design and interfacing with ADC in the coming weeks.
It would be great if we could discuss using the nanosoc ADC with Daniel.
Hi John, thank you for that!…
Hi John, thank you for that! We have completed the reference design phase of our sensors and will be looking at improving the design and interfacing with ADC in the coming weeks.
It would be great if we could discuss using the nanosoc ADC with Daniel - how can we contact him?
ADC access
Hi,
We currently have published a verilog-ams model of the ADC here
We still need to figure out exactly how we are supposed to share the full macro for backend analysis without breaking NDA with TSMC. But I will keep you updated on that.
This block has been integrated in nanosoc, you just have to make changes to the nanosoc.config file and set ADC_0_INCLUDE:=yes to include the ADC subsystem. This currently works well with VCS simulator, I've not completely figured out yet how to support verilog-AMS code on other simulators
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