The Synopsys HAPS® System adds additional capabilities to the FPGA-based prototyping environments SoC Labs can use to support projects. The HAPS® system provides a greater amount of logic resources supporting development of larger SoC designs. It can be used to support multiple projects simultaneously. It is used by many semiconductor companies, including arm for their CPU verification. This collaboration project will use the HAPS® system in SoC Labs projects and share with the community experience in utilising such systems.

A Xilinx ZCU104 ZYNQ UltraSCALE gives a capable environment for developing the nanosoc reference design. As larger reference designs are developed they require larger FPGA-based prototyping environments to assist in their development. While a nanosoc based SoC design can be completed by a single person with a dedicated development environment, larger SoC designs require a team approach and a shared development environment. Team based development can use HAPS systems for a variety of roles in the SoC development cycle:

• verify the synthesizable RTL source code of larger SoC designs
• SoC Labs already uses a Continuous Integration and Deployment for verification approach where a virtualised environment builds the developing SoC design and regularly exercises it in a Design under Test environment. The HAPS system will improve this capability.
• support hardware/software co-design by supporting developers to write and test software on emulated SoC designs