Welcome to SoC Labs.

It was good to meet up with you again last week. I would like to find ways to support your plans to work to bring together the Indonesian universities and the work around the Indonesia Chip Design Collaborative Center (ICDeC). 

I am looking to do something similar in Canada, take a look at the SoC Labs project for this here.

I would like to start a project with you on this activity.

John.

Hi,

I see you have a paper,  Physical Design of RISC-V based System-on-Chip using OpenLane This looks a similar SoC to nanoSoC.  Will you use open source tools for the Indonesia Chip Design Collaborative Center or commercial EDA tools. We have proven flows for Synopsys and Cadence but not for OpenLane. I would be intereted to understand the design environments you propose to support.

John.