Hardware design

This area of 'interest' is for the hardware design ecosystem for Arm based System on Chip developments. This area is for discussion of design techniques. Specific design flow actions should be discussed in the design flow section.

Projects Using This Interest

Collaborative
Request of Collaboration
A53 simplified testbench
SoClabs

Arm Cortex-A53 processor

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Competition 2024
Competition: Hardware Implementation
Accelerated Tiny-Transformer IP

FPGA-Powered Acceleration for NLP Tasks

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Competition 2024
Competition: Collaboration/Education

IMPLEMENTATION OF FIXED TIME BASED TRAFFIC LIGTH SYSTEM USING FPGA WITH VERILOG HDL.

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Reference Design
Active Project
High bandwidth expansion subsystem block diagram
SoClabs

High Bandwidth Expansion Subsystem

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Competition 2024
Competition: Hardware Implementation

Battery Management System-on-chip (BMSoC) for large scale battery energy storage

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Collaborative
Request of Collaboration

Basic PLL with TSMC 65nm

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Competition 2024
Competition: Collaboration/Education

A digital audio dynamic range compression accelerator for mixed-signal SoC

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Not see the kind of project you are looking for? Create a Request for Collaboration project to find potential collaborators for your idea.

Experts and Interested People

Members

 
Profile picture for user Amit Acharyya
Name
Amit Acharyya
Research Area
VLSI systems resource-constrained applications, Low Power Design Techniques, Machine learning hardware design, Signal Processing Algorithm and VLSI Architectures, Digital Arithmetic, Biomedical Devices. AI/ML, Nanoscience & Technology
Role
Professor
 
Name
SeanTu
Research Area
machine learning
Role
master degree student

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