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DMA Infrastructure Developments
The aim of of this project is to produce a variety of DMA Infrastructures for reusable SoC reference designs containing Arm-based microprocessors that can be picked up and used by researchers, academics and students with minimal modifications to allow them to easily implement experimental systems.
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Efficient Keyword-Spotting on an Arm M7 microcontroller
This 4 month PhD Interdisciplinary Team Project used an Arm M7 to measure actual energy used in different forms of inference and feature extraction for keyword spotting.
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dflynn-University of Southampton

Arm Cortex-M0 microcontroller
A reference design based on an Arm Cortex-M0 CPU and the Cortex-M0 Design Kit provided in the Corstone-101 subsystem package, available under the Arm Academic Access agreement.
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Fused: Closed-loop Performance and Energy Simulation of Embedded Systems

Fused is a full-system simulator for modelling energy-driven computers. To accurately model the interplay between energy-availability, power consumption, and execution; Fused models energy and execution in a closed feedback loop.

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d.wf @ soclabs

Hardware SoC bus level debug agent (v4)
A hardware Finite State Machine on-chip AMBA interconnect controller using a serial ASCII debug protocol, with functional upgrades to Version 4 to support 8-, 16- and 32-bit accesses, to facilitate off-chip validation.
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Case Study

3D-stacked cortex-M0 SoC with wireless inter-tier data and power transfer

This project developed a 2-tier 3D-stacked Cortex-M0 SoC, in 65nm CMOS technology, with wireless inter-tier power and data transfer through an inductively coupled bus which achieved 20.3Gbps/mm2 data, and 7.1mW/mm2 power transfer simultaneously through a 250 µm channel. At the time of publishing it was the smallest ever reported inductive data and power link.

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Event-B to FPGA process flows

The aim of the project will be to establish the tool chain and flows to demonstrate Event-B refinement to a Register Transfer Level implementation that can target an FPGA implementation. Previous European, EC Information and Communication Technologies FP7 DEPLOY and European Union ICT Project ADVANCE developed VHDL code generation from Event-B models. A number of projects within these and other research programmes have looked at the required process flows. The Rodin Platform is an open source Eclipse-based IDE for Event-B.