Performing system-level verification on a System-on-Chip (SoC) design is crucial for ensuring the correct function and overall performance of the entire system, rather than individual components. This project is aimed at developing the necessary resources and design flow stages for the verification of the NanoSoC reference design.

Architectural Design: Verification Methodology

With NanoSoC, there are multiple options for performing system-level verification. 

Project Motivation and Goals

The k-Nearest-Neighbours (kNN) algorithm is a popular Machine Learning technique that can be used for a variety of supervised classification tasks. In contrast to other machine learning algorithms which "encode" the knowledge gained from training data to a set of parameters, such as weights and biases, the parameter set of a kNN classifier consists of just labelled training examples. Classification of an unlabelled example takes place by calculating its Euclidean distance (or any other type of distance metric) from all the stored training examples.

A small Arm Cortex-M0-based SoC development framework to support research demonstrator designs. Successfully used for 2023/4 competition tape-outs, now archived as a Case Study

Example case-study of using the Arm CMSDK AMBA-AHB Bus-Matrix tools to build system-optimised interconnect.