Academic Institution

People

Research Area
Formal modelling
Role
Researcher
Name
Research Area
Formal System Development
Role
Lecturer
Research Area
Cyber-physical systems
Role
Senior Research Fellow
Research Area
UML-B
Role
Dean of the Faculty of Engineering and Physical Sciences
Research Area
Advanced Packaging
Role
Cleanroom Process Integration Engineer
Research Area
Security of Hardware
Role
National Teaching Fellow
Research Area
Microwaves, Antennas, RFID/RFIC, Packaging
Role
UK IC Research Fellow and Proleptic Lecturer

Known Good Dies

Copyright 2022 © Arm and University of Southampton | All Rights Reserved

COILS-C1 65nm SoC with M0 cores in 3D stack

Low-cost 3D die stacking using near-field wireless communication.

This two-tier SoC, fabricated using a TSMC 65nm process, incorporates two Arm Cortex M0 CPU cores in addition to a wireless vertical AHB lite bus for inter-layer power and data transfer. The wireless AHB-Lite bus consists…

SoClabs

nanoSoC 2023/4

The first tape out of the nanoSoC Cortex M0 based SoC Reference Design. This reference design provides a simple microcontroller system appropriate to host and support the development and evaluation of research IP blocks or subsystems. It supports seamless transition from FPGA to physical silicon …

Copyright 2022 © Arm and University of Southampton | All Rights Reserved

Pipistrelle-4 65nm low power multi-project SoC

Pipistrelle-4, is the latest in a series SoCs for demonstrating multiple student projects in low-energy systems. Various circuit/system ideas from multiple researcher focusing on energy and performance with optimised SRAM bitcell and low-area overhead energy-efficient flip-flops.

P…

University of Southampton

Country
United Kingdom of Great Britain and Northern Ireland (the)
Members 29
Projects 19
Articles 6
Contributor since: Wed, 06/30/2021 - 14:50
AAA Member

Actions

Projects

Collaborative
Request of Collaboration
A53 simplified testbench
SoClabs

Arm Cortex-A53 processor

There has been much request within the SoC Labs community for an Arm A-Class SoC that can support a full operating system platform, undertake more complex compute tasks and enable more complicated software loads. The Cortex-A53 is Arm's most widely deployed 64-bit Armv8-A processor and can provide these capabilities with power efficiency

Collaborative
Request of Collaboration
©2024 Synopsys, Inc. All rights reserved.

Use of the Synopsys HAPS® FPGA-based prototyping environment

The Synopsys HAPS® System adds additional capabilities to the FPGA-based prototyping environments SoC Labs can use to support projects. The HAPS® system provides a greater amount of logic resources supporting development of larger SoC designs. It can be used to support multiple projects simultaneously. It is used by many semiconductor companies, including arm for their CPU verification. This collaboration project will use the HAPS® system in SoC Labs projects and share with the community experience in utilising such systems.

Collaborative
Active Project
In partnership with Canada
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Geographical support for Canada

This collaboration project is aimed at providing specific tailored activities to the local geography in Canada by developing local actions that will help stimulate academics and their institutions and the broader semiconductor industry supporters to create new and exciting SoC design projects. 

It may include holding specific local physical meetups where people can exchange design ideas.

It may include utilising locally provided routes to fabrication.

It may include sharing hard to locate test capability across academic institutions.

Reference Design
Active Project
Block Diagram of SRAM chiplet

SRAM Chiplet

On-chip SRAM in ASICs can use a significant area, which equates to a significant cost. One solution is to make the memory off-chip. This project explores the use of Arm IP to create an SRAM chiplet design. The benefit  is that standard memory chiplets can be fabricated at lower cost and used across multiple projects, miminising silicon area to the unique project needs.