Hi,

It would be most helpful to get an update on how you are getting on with the Behavioural Modelling milestone for the analog front end and also the progress on the Corstone-101 reference implementation?

We look forward to hearing from you.

Hi,

As we are now into the start of October it would be good to get an update on your milestones at the end of September. 

We need to understand if it is likely you will be making progress so we can progress a tape out. 

If you need any help or support for the project please let us know. 

We look forward to hearing from you.

Hi,

As we are now into the start of October it would be good to get an update on your milestones at the end of September.

We need to understand if it is likely you will be making progress so we can progress a tape out.

If you need any help or support for the project please let us know.

We look forward to hearing from you.
 

Hi,

As we are now into the start of October it would be good to get an update on your milestones at the end of September.

We need to understand if it is likely you will be making progress so we can progress a tape out.

If you need any help or support for the project please let us know.

We look forward to hearing from you.
 

The Vela compiler is a tool to further optimise a TensorFlow LiteRT model to be accelerated by the arm Ethos-U microNPU. The compilation uses custom operators for parts of the model that can be accelerated by the Ethos-U microNPU. Parts  cannot be accelerated are left unchanged for execution on the CPU.

Copyright © 1995-2024 Arm Limited (or its affiliates). All rights reserved.

It supports quantization to either 8-bit or 16-bit (signed). The compilation can be configured to suite the specific hardware instantiation of Ethos hardware, adjusting properties like memory locations, latencies and bandwidths.  The compiler works in coordination with a runtime driver to control which AXI ports to use for memory data access for the model.

Hi,

That is great, we look forward to the update. In terms of collaboration, the team from Sydney and Obafemi Awolowo look to have similar requirements for the overall SoC design. We will look to arrange a collaboration call with you all.

Have a look at Sydney and what they have shared so far.

We look forward to hearing from you.

Hi,

I have added some initial material on the Overview of design and deployment of ML/AI for the arm ecosystem and also two sub-topics on specific tool chains/environments, one on TensorFLow and specifically how it maps to the arm ecosystem and one on HLS4ML which is proving popular. If people want to comment or add an additional sub-topic on a tool chain/environment they are using that would be great.

We will aim to add more information on deployment of such tool chains/environments in combination with the developing SoC Labs reference designs as they develop. Please feel free to contribute as you feel able.

Hi,

Welcome to SoC Labs, are you working with Zaheer Khan at Oulu on his project for automotive radar? If you are then you can add it to your profile. If not then I see you have declared interests in ML and the HLS4ML framework. Looking at the technology in accelerators and on chip comms then are you planning to develop a custom accelerator? 

Look forward to hearing more ... and then we can see how we can help.

Hi,

I see you joined the slack channel. Looking forward to working with you.

John.

Hi,

It is great to see a Southampton alumni interested in SoC Labs. I see you are interested in RF and analog design. Is there any specific interest? We look forward to your replay and figuring out how we might collaborate.